Intel
SoC Design Lead
Intel, Santa Clara, California, United States, 95050
Job Details:Job Description: Position Overview: We are seeking a highly motivated and experienced Engineering SoC Design Lead to lead our dynamic multi national team in the development and delivery of state-of-the-art System on Chip in our Server and IP Group.
Check all associated application documentation thoroughly before clicking on the apply button at the bottom of this description.
The ideal candidate will ideally have a proven track record in managing complex VLSI SOC projects from conception to production, ensuring quality, timeliness, and budget adherence.
The role requires good knowledge of SoC microarchitecture, IP reuse methodologies, integration/verification processes, and excellent communication and management skills.Key Responsibilities:Develop and execute project plans, including defining scope, goals, deliverables, timelines, and resource allocation.Coordinate cross-functional teams including design, verification, physical implementation, and validation to ensure project milestones are met.Identify and mitigate project risks, proactively addressing potential roadblocks to ensure successful project delivery.Allocate and manage project resources effectively, ensuring team members have the necessary tools and support to meet project goals.Facilitate clear and effective communication with internal stakeholders, external partners, and customers, providing regular updates on project status, risks, and deliverables.Implement and oversee quality assurance processes to ensure designs meet industry standards and customer requirements.Monitor project expenses and manage the budget, ensuring efficient resource utilization and cost control.Stay up-to-date with the latest trends and technologies in VLSI SOC design and provide technical guidance and mentorship to the project team.Proven track record of managing complex SOC projects.
Deep understanding of Chip Design life cycleStrong understanding of VLSI design methodologies, tools, and flowsExcellent leadership, communication, and interpersonal skills.Ability to work effectively in a fast-paced, dynamic environment.Qualifications:Qualifications:Bachelor's or higher degree in Electrical Engineering or related field, with 10+ years of industry experienceMinimum of 5 years of experience in managing Silicon design teamsMinimum of 2 years of experience in VLSI SOC project management of high scale projectsJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, California, FolsomBusiness group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products.
From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.
DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.
As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust.
Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks.
For internals, this investigation may or may not be completed prior to starting the position.
For additional questions, please contact your Recruiter.Benefits:We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$186,760.00-$299,166.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, California, Santa Clara; US, California, FolsomType: Full time
Check all associated application documentation thoroughly before clicking on the apply button at the bottom of this description.
The ideal candidate will ideally have a proven track record in managing complex VLSI SOC projects from conception to production, ensuring quality, timeliness, and budget adherence.
The role requires good knowledge of SoC microarchitecture, IP reuse methodologies, integration/verification processes, and excellent communication and management skills.Key Responsibilities:Develop and execute project plans, including defining scope, goals, deliverables, timelines, and resource allocation.Coordinate cross-functional teams including design, verification, physical implementation, and validation to ensure project milestones are met.Identify and mitigate project risks, proactively addressing potential roadblocks to ensure successful project delivery.Allocate and manage project resources effectively, ensuring team members have the necessary tools and support to meet project goals.Facilitate clear and effective communication with internal stakeholders, external partners, and customers, providing regular updates on project status, risks, and deliverables.Implement and oversee quality assurance processes to ensure designs meet industry standards and customer requirements.Monitor project expenses and manage the budget, ensuring efficient resource utilization and cost control.Stay up-to-date with the latest trends and technologies in VLSI SOC design and provide technical guidance and mentorship to the project team.Proven track record of managing complex SOC projects.
Deep understanding of Chip Design life cycleStrong understanding of VLSI design methodologies, tools, and flowsExcellent leadership, communication, and interpersonal skills.Ability to work effectively in a fast-paced, dynamic environment.Qualifications:Qualifications:Bachelor's or higher degree in Electrical Engineering or related field, with 10+ years of industry experienceMinimum of 5 years of experience in managing Silicon design teamsMinimum of 2 years of experience in VLSI SOC project management of high scale projectsJob Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, California, FolsomBusiness group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products.
From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.
DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.
As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust.
Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks.
For internals, this investigation may or may not be completed prior to starting the position.
For additional questions, please contact your Recruiter.Benefits:We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$186,760.00-$299,166.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, California, Santa Clara; US, California, FolsomType: Full time