Apple
Design Verification Lead
Apple, Austin, Texas, us, 78716
Summary
Posted: Nov 14, 2023
Role Number:
200520606
Are you a leader and want to apply your engineering background to make big things happen? Can you influence, connect, get results, and communicate effectively while delivering on a predictable and dynamic schedule? The Custom Silicon Management Group provides critical custom silicon for all mobile products including iPhone, iPad, iPod, and AppleTV. We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon suppliers working on groundbreaking technologies! We are looking for a remarkable Design Verification Lead to work with multi-functional teams and external vendors to define, develop, and productize the next generation of mobile solutions.
Description
As a CSM (Custom Silicon Management) DV lead, you will be leading the DV front for vendor silicons (power, display, touch, and sensors, accessories). You will manage throughout the entire project phase, from specification, planning, execution, to sign-off. Key tasks include:Work closely with internal & external teams to review specifications, improve DV plans & methodologies, and ensure full verification coverage.Collaborate with design & micro-architecture teams to understand the functional & performance goals of the design.Lead and track DV progress and quality. Review DV architecture, implementation, metrics. Provide technical guidance to planning, execution, and long-term technology roadmap.
Key Qualifications
Advanced knowledge of ASIC architecture, design, and verification flow.Expert knowledge of state-of-the-art verification flow and methodology, such as constrained random, functional/code coverage, assertions, GLS.Hands-on experience with modern verification languages, including SystemVerilog / UVM.Knowledge of industry standard interfaces.Knowledge of Formal verification, low power verification, and analog mixed signal simulation are a plus.Excellent social and communication skills, team spirit, and the passion to take on diverse challenges.
Education & Experience
- BS and a minimum of 10+ years of relevant industry experience is required.- MSEE / MSCE or PhD is preferred.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.#J-18808-Ljbffr
Posted: Nov 14, 2023
Role Number:
200520606
Are you a leader and want to apply your engineering background to make big things happen? Can you influence, connect, get results, and communicate effectively while delivering on a predictable and dynamic schedule? The Custom Silicon Management Group provides critical custom silicon for all mobile products including iPhone, iPad, iPod, and AppleTV. We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon suppliers working on groundbreaking technologies! We are looking for a remarkable Design Verification Lead to work with multi-functional teams and external vendors to define, develop, and productize the next generation of mobile solutions.
Description
As a CSM (Custom Silicon Management) DV lead, you will be leading the DV front for vendor silicons (power, display, touch, and sensors, accessories). You will manage throughout the entire project phase, from specification, planning, execution, to sign-off. Key tasks include:Work closely with internal & external teams to review specifications, improve DV plans & methodologies, and ensure full verification coverage.Collaborate with design & micro-architecture teams to understand the functional & performance goals of the design.Lead and track DV progress and quality. Review DV architecture, implementation, metrics. Provide technical guidance to planning, execution, and long-term technology roadmap.
Key Qualifications
Advanced knowledge of ASIC architecture, design, and verification flow.Expert knowledge of state-of-the-art verification flow and methodology, such as constrained random, functional/code coverage, assertions, GLS.Hands-on experience with modern verification languages, including SystemVerilog / UVM.Knowledge of industry standard interfaces.Knowledge of Formal verification, low power verification, and analog mixed signal simulation are a plus.Excellent social and communication skills, team spirit, and the passion to take on diverse challenges.
Education & Experience
- BS and a minimum of 10+ years of relevant industry experience is required.- MSEE / MSCE or PhD is preferred.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.#J-18808-Ljbffr