Renesas Electronics Corporation
Mask Designer 3
Renesas Electronics Corporation, Morrisville, North Carolina, United States, 27560
Job Description
This position is in the Renesas BMS group. The purpose of this position is to create cells and some top-level layouts for our BMS design teams. The devices include power management, analog products, and digital core layouts. The candidate will utilize the Cadence toolset and require interaction with circuit designers, layout designers, and the CAD team.Responsibilities:
Some Top-level layout floor planningCustom cell layout and verificationComplete the physical layout design with the constraints of circuit design requirements.Execute mask data release and archiving.Verify the physical layout design to meet both circuit design requirements and process requirements.Use new tools and methods to improve layout design quality and efficiency.Qualifications
BS in Electrical Engineering or related engineering field or Technical Degree preferred.3 - 10 years of experience minimum required.Basic understanding of electronic principles dealing with circuit and layout design.Good working knowledge of BCD and CMOS processes.Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout physical verification.Familiar with device physics is preferred.Team player with good communication skills.
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This position is in the Renesas BMS group. The purpose of this position is to create cells and some top-level layouts for our BMS design teams. The devices include power management, analog products, and digital core layouts. The candidate will utilize the Cadence toolset and require interaction with circuit designers, layout designers, and the CAD team.Responsibilities:
Some Top-level layout floor planningCustom cell layout and verificationComplete the physical layout design with the constraints of circuit design requirements.Execute mask data release and archiving.Verify the physical layout design to meet both circuit design requirements and process requirements.Use new tools and methods to improve layout design quality and efficiency.Qualifications
BS in Electrical Engineering or related engineering field or Technical Degree preferred.3 - 10 years of experience minimum required.Basic understanding of electronic principles dealing with circuit and layout design.Good working knowledge of BCD and CMOS processes.Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout physical verification.Familiar with device physics is preferred.Team player with good communication skills.
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