TRG
ASIC Designer
TRG, Santa Barbara, CA
RESPONSIBILITIES
REQUIREMENTS
PREFERRED REQUIREMENTS
IMMEDIATE BENEFITS
- Establish block level specifications based on system requirements
- Design, simulate, implement and test analog/mixed-signal CMOS transistor level circuit designs for LIDAR application.
- Guide physical design team to establish optimal layout and perform post-layout analysis.
- Support chip level validation, test development, lab characterization, and transition to mass production.
- Technology nodes range from 22 nm - 180 nm.
REQUIREMENTS
- Bachelor's degree in Electrical Engineering, Physics or related discipline.
- Minimum 5 years of experience in CMOS analog/mixed-signal design.
- Experienced in ASIC Design
- Understanding of key challenges in sensor design (mitigation of signal and power supply crosstalk)
- Familiarity with standard EDA tool suites for custom circuit design (Cadence, Mentor, Synopsys)
- Good communication skills and successful in a team-oriented environment.
PREFERRED REQUIREMENTS
- Automotive experience
- Familiarity with digital design flow and tools
- Familiarity with optical receivers
IMMEDIATE BENEFITS
- Paid Time Off
- Tuition and Employee Discounts
- Annual Bonus
- Employer 401(k) Match