Hireio, Inc.
ASIC Library Characterization Engineer Job at Hireio, Inc. in Los Angeles
Hireio, Inc., Los Angeles, CA, United States, 90079
Responsibilities
You will be part of our digital library development team working on deep sub-micron technology nodes (Intel 18A, 1.8nm).
- Co-work with digital STD customization engineers, driving specification and implementation.
- Generate liberty timing views for customized digital STD cells with ultra low voltage.
- Write characterization scripts and library validation scripts.
Qualifications
- B.S., M.S., Ph.D or related field required.
- At least 8+ years of experience in Library characterization is required.
- Successful track record using industry-standard tools: SiliconSmart, Liberty (.lib) generation, Cadence ADE, Spectre, Hspice, Prime Time. SiliconSmart experience is preferred.
- Strong fundamental knowledge of digital timing theory.
- Strong fundamental knowledge for AMS design, Advanced CMOS, and FinFET technologies.
- Circuit design experience in mixed signal CMOS circuits with FinFET technologies. Must have analog design simulation experience.
- Deep understanding of analog and mixed-signal circuits.
- Understanding of Mismatch analysis & Monte-Carlo methodology/sims.