Principal Analog IC Designer

The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Responsibilities and Qualifications:

• Candidate’s background should include a minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
• Working knowledge of a set of common SerDes standards and their electrical requirements is a plus.
• Must have a thorough understanding of jitter and signal equalization techniques.
• Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators.
• Excellent problem-solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment.
• Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification.
• Cadence tool experience, lab test experience, and design experience at >10Gbps.
• MS or PhD in EE.

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies, and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.