Cadence Design Systems
Sr. Principal Analog IC Designer
Cadence Design Systems - San Jose, California, United States, 95123
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Overview
Sr. Principal Analog IC Designer
Skills, Experience, Qualifications, If you have the right match for this opportunity, then make sure to apply today. Sr. Principal Analog IC Designer Apply now. Locations: SAN JOSE. Type: Full-time. Posted: 30+ Days Ago. Job Requisition ID: R49008.
About Cadence At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Description The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.
Minimum 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
Knowledge of common SerDes standards and electrical requirements is a plus.
Thorough understanding of jitter and signal equalization techniques.
Design experience in circuit blocks such as Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, ADC, DAC, Bias, Bandgap, and Voltage Regulators.
Strong problem-solving skills, analog aptitude, good communication skills, and team collaboration ability.
Proficiency with CAD tools for circuit simulation, layout, and physical verification.
Experience with Cadence tools, lab testing, and designs at >10Gbps in
Skills, Experience, Qualifications, If you have the right match for this opportunity, then make sure to apply today. Sr. Principal Analog IC Designer Apply now. Locations: SAN JOSE. Type: Full-time. Posted: 30+ Days Ago. Job Requisition ID: R49008.
About Cadence At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Description The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.
Minimum 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
Knowledge of common SerDes standards and electrical requirements is a plus.
Thorough understanding of jitter and signal equalization techniques.
Design experience in circuit blocks such as Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, ADC, DAC, Bias, Bandgap, and Voltage Regulators.
Strong problem-solving skills, analog aptitude, good communication skills, and team collaboration ability.
Proficiency with CAD tools for circuit simulation, layout, and physical verification.
Experience with Cadence tools, lab testing, and designs at >10Gbps in