FPGAASIC Design Verification
Sedaa - San Jose, California, United States, 95199
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Overview
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Overview
JOB TITLE - FPGA DESIGNER
Location- San Jose,CA (Currently remote due to SIP)
Client: Cisco
Location: Currently remote, ( onsite San Jose, CA once SIP lift)
Duration: 6 months -1 years
OTHER PREFERENCES:
-Cisco preferred experience
-Worked with high speed power 10g plus.
-Experience PCI Express Design
-should have good communication skills
JOB DESCRIPTION:
Candidate will be responsible for taking networking system requirements, mapping them into functional blocks for FPGA implementation, working with the cross functional team to address development requirements, participate in validation of the system, and release to manufacturing
HERE IS A LIST OF REQUIREMENTS
FPGA development expertise from specification to production,
Verilog/System Verilog RTL coding
Knowledge of industry leading FPGA devices and tools,
Familiarity with UVM and/or VMM DV methodology,
Experience with high speed design debug,
Experience with advanced microprocessor based design
Proficiency with lab equipment such as scope and analyzer
Good communication and cross functional team skills
EDUCATION/EXPERIENCE:
Bachelor's Degree in Computer Engineering or related field
Prior experience required
Previous lab experience a must
ABOUT SEDAA:
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