Apple Inc.
Media-IP SoC Performance Architect
Apple Inc., Cupertino, California, United States, 95014
Do you love crafting elegant solutions to highly complex challenges? Are you a big-picture forward-thinking individual who understands how each element affects all the others? At Apple, our Architecture group is responsible for connecting our hardware and software into one unified system! Join this team, and you’ll collaborate with engineers across Apple to design how all of our technologies work in unison. We are looking for an experienced Media-IP SoC Performance Architect to join our small dynamic team. We own the performance models of several of the complex multi-media IPs in Apple’s SoCs. These IPs are central to the customer experience in almost all of Apple’s products from Apple Watch, iPhone, iPad, MacBook, and next-generation product lines. In this highly visible role, you will collaborate closely with cross-functional teams to develop, verify, and use performance models for data-driven architectural exploration and validation.
Applying for this role is straight forward Scroll down and click on Apply to be considered for this position.Key QualificationsBS and 20+ years of relevant industry experienceStrong understanding of SoC, fabric, and memory system architecturesStrong software development and organizational skills especially with modular object-oriented SW architectures in C++Fast learner with strong problem-solving and analytical skillsExperience with performance model development & analysisExcellent written and verbal communication skills for cross-functional collaboration and presentations5+ years of experience in performance modeling and architecturePREFERRED QUALIFICATIONSGood understanding of data analytics, statistics, and applied ML (machine learning) for analyzing large data setsExpertise in C++ & latest STL libraries, knowledge of Python, Lua, and shell scripting languagesGood understanding of QoS, arbitration, and queuing theoryDescriptionAs a Media-IP SoC Performance Architect, you will have responsibilities spanning all aspects of performance model development: planning model architecture, implementation, validation, performance studies, and RTL correlation. Collaborate with system architecture and IP design teams to plan, implement, and validate a high-level performance model in C++. The performance model is a minimal feature set to meet the model accuracy requirements yet modular and flexible enough to be adapted for new projects and architectural exploration. Develop, analyze, and present results of performance studies for different architectural and micro-architectural proposals from within the team as well as other architecture and design teams. Develop custom tools for analyzing simulation results of these complex architectures to provide new insights into their behavior and propose innovative architectural changes to improve the performance. Present performance study results to design teams and other architecture teams. Validate the performance model against the specification and correlate the model with RTL.Education & ExperienceBS and 20+ years of relevant industry experience
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Applying for this role is straight forward Scroll down and click on Apply to be considered for this position.Key QualificationsBS and 20+ years of relevant industry experienceStrong understanding of SoC, fabric, and memory system architecturesStrong software development and organizational skills especially with modular object-oriented SW architectures in C++Fast learner with strong problem-solving and analytical skillsExperience with performance model development & analysisExcellent written and verbal communication skills for cross-functional collaboration and presentations5+ years of experience in performance modeling and architecturePREFERRED QUALIFICATIONSGood understanding of data analytics, statistics, and applied ML (machine learning) for analyzing large data setsExpertise in C++ & latest STL libraries, knowledge of Python, Lua, and shell scripting languagesGood understanding of QoS, arbitration, and queuing theoryDescriptionAs a Media-IP SoC Performance Architect, you will have responsibilities spanning all aspects of performance model development: planning model architecture, implementation, validation, performance studies, and RTL correlation. Collaborate with system architecture and IP design teams to plan, implement, and validate a high-level performance model in C++. The performance model is a minimal feature set to meet the model accuracy requirements yet modular and flexible enough to be adapted for new projects and architectural exploration. Develop, analyze, and present results of performance studies for different architectural and micro-architectural proposals from within the team as well as other architecture and design teams. Develop custom tools for analyzing simulation results of these complex architectures to provide new insights into their behavior and propose innovative architectural changes to improve the performance. Present performance study results to design teams and other architecture teams. Validate the performance model against the specification and correlate the model with RTL.Education & ExperienceBS and 20+ years of relevant industry experience
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