Hireio, Inc.
ASIC Library Characterization Engineer Job at Hireio, Inc. in Los Angeles
Hireio, Inc., Los Angeles, CA, United States, 90189
Responsibilities
•You will be part of our digital library development team working on deep sub-micron technology nodes (Intel 18A, 1.8nm).
•Co-work with digital STD customization engineers. driving specification and implementation
•Generate liberty timing views for customized digital STD cells with ultra low voltage.
•Write some characterization scripts and library validation scripts.
Requirements
Qualifications
•B.S., M.S., Ph.D or related field required
•At least have 8+ years experience in Library characterization is required.
•Successful track record using industry-standard tools: SiliconSmart, Liberty (.lib) generation, Cadence ADE, Spectre, Hspice, Prime Time. Have SiliconSmart experience is prefer.
•Strong fundamental knowledge of digital timing theory.
•Strong fundamental knowledge for AMS design, Advanced CMOS, and FinFET technologies.
•Circuit design experience in mixed signal CMOS circuits with FinFET technologies. Must have analog design simulation experience.
•You should have a deep understanding of analog and mixed-signal circuits.
•Understanding of Mismatch analysis & Monte-Carlo methodology/sims.
•You will be part of our digital library development team working on deep sub-micron technology nodes (Intel 18A, 1.8nm).
•Co-work with digital STD customization engineers. driving specification and implementation
•Generate liberty timing views for customized digital STD cells with ultra low voltage.
•Write some characterization scripts and library validation scripts.
Requirements
Qualifications
•B.S., M.S., Ph.D or related field required
•At least have 8+ years experience in Library characterization is required.
•Successful track record using industry-standard tools: SiliconSmart, Liberty (.lib) generation, Cadence ADE, Spectre, Hspice, Prime Time. Have SiliconSmart experience is prefer.
•Strong fundamental knowledge of digital timing theory.
•Strong fundamental knowledge for AMS design, Advanced CMOS, and FinFET technologies.
•Circuit design experience in mixed signal CMOS circuits with FinFET technologies. Must have analog design simulation experience.
•You should have a deep understanding of analog and mixed-signal circuits.
•Understanding of Mismatch analysis & Monte-Carlo methodology/sims.