CPU Micro Architect / Logic Designer
Ventana Micro Systems - Cupertino, California, United States, 95014![Ventana Micro Systems](/api/image?src=https%3A%2F%2Fgeneral-board-default.s3.us-east-2.amazonaws.com%2Fpublic%2Fimages%2Fdesk-360x180.webp&w=640&q=75&f=webp)
Work at Ventana Micro Systems
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Overview
Check out our CEO
talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center.Ventana is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the
Hottest Semiconductor
startups in the industry.CPU Micro Architect /Logic Designer Responsibilities:Develop and refine microarchitecture, write design specifications, and deliver and maintain RTL for CPU Core and/or system-level sub-unitsWork with physical design engineers to physically realize Core/subsystem RTL using deep sub-micron process technologiesWork with design verification/validation engineers to effectively test and debug Core/subsystem-level RTL in simulation, prototyping platforms, and siliconHelp model, analyze, debug, and address performance issues and opportunitiesQualifications Required:8+ years industry experience working on RTL for high performance CPU or GPU, memory subsystem, or related system-level designsBachelors or Masters degree in related engineering fieldAbility to work independently and across geographiesStrong domain knowledge of computer architectureSkills Desired:Verilog/SystemVerilog development experienceIndustry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systemsExperience with high frequency design considerations (timing, power, multiple clock domains, etc.)Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and routeExperience in compiled and/or interpreted (Python, perl) languagesUnit or feature ownership throughout the project lifecyclePost-silicon validationBachelors or Masters degree in computer science or related engineering fieldsBASE SALARY RANGE$115,000 TO $268,000 per year
EEOE
Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.COVID-19
Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.
NOTICE: External Recruiters/ Staffing Agencies:
Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.Please Note:
Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.
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