Marvell Semiconductor, Inc.
Senior Director of ASIC CAD & Design Methodology
Marvell Semiconductor, Inc., Santa Clara, California, us, 95053
About Marvell
In order to make an application, simply read through the following job description and make sure to attach relevant documents.Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.Your Team, Your ImpactAs our Head of CAD and design Methodology, you will be responsible for developing the ASIC Tool Flow and Methodologies. You will play a leading role in the definition and development of the flow that will be used by all Marvell BUs to design all chips at Marvell. You will use your extensive design and CAD knowledge to define the organization's design methodology and workflow. You will architect complex automated flows for building chips (small to big) focusing on quality and designer productivity. You will lead and develop 7 direct reports with an organization of 70+ people located in 5 regions.
What You Can ExpectTo thrive in this role, you must have:Experience leading teams across multiple geographies. This is essential for this role, as you will be responsible for a team of engineers who are located all over the world. You must be able to effectively communicate and collaborate with people from different cultures and time zones.Communication: Clearly and concisely communicating with technical and non-technical audiences is essential for any leader. This includes giving clear instructions, listening to feedback, and resolving conflicts.Problem-solving: Identifying and solving problems is essential for any engineer, but it is especially important for leaders. This includes thinking critically, coming up with creative solutions, and making decisions under pressure.Decision-making: The ability to make sound decisions is essential for any leader. This includes weighing the pros and cons of different options, gathering input from others, and making decisions that are in the best interests of the team or organization.Motivation: Any leader's ability to motivate and inspire others is essential. This includes setting clear goals, providing feedback, and creating a positive work environment.Teamwork: Working effectively with others is essential for any leader. This includes building trust, delegating tasks, and resolving conflicts.Change management: Managing change is essential for any leader, especially in the fast-paced world of technology. This includes communicating the need for change, managing resistance, and helping people adapt to new ways of working.Past or present programming experience using Tcl/Tk/Perl/Python/C/C++, as well as Extraction and STA methodologies and tools. This experience will be essential for you to be able to review software architecture and building/maintaining large code base.Demonstrated design and methodology expertise on building ASIC chips in 5nm and below process nodes. This expertise is essential for you to be able to understand and anticipate the requirements for CAD flows. Building CAD flows that focus on improving designer productivity and quality including all available technologies including advanced AI/ML applications in EDA/Chip design space is going to be your end goal.Demonstrable understanding of all aspects of ASIC design flows, DFT, and ATPG flows. This understanding is essential for you to drive methodology unification across a diverse set of business units and SOCs.Solid knowledge of chip integration and chip signoff.
This knowledge will be essential for you to design tools, flows and methodologies for designing chips/chiplets/IPs that would all work seamlessly with each other.What We're Looking ForBS/MS in EE/CS with 15+ years of hands-on experience on design implementation, CAD software or flow development on high-performance CPU and/or SOC designs.Proven track records of leading/architecting flow/tool development.Experience leading teams across multiple geos is a MUST.Expected Base Pay Range (USD)192,600 - 288,500, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional Compensation and Benefit ElementsAt Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
#J-18808-Ljbffr
In order to make an application, simply read through the following job description and make sure to attach relevant documents.Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.Your Team, Your ImpactAs our Head of CAD and design Methodology, you will be responsible for developing the ASIC Tool Flow and Methodologies. You will play a leading role in the definition and development of the flow that will be used by all Marvell BUs to design all chips at Marvell. You will use your extensive design and CAD knowledge to define the organization's design methodology and workflow. You will architect complex automated flows for building chips (small to big) focusing on quality and designer productivity. You will lead and develop 7 direct reports with an organization of 70+ people located in 5 regions.
What You Can ExpectTo thrive in this role, you must have:Experience leading teams across multiple geographies. This is essential for this role, as you will be responsible for a team of engineers who are located all over the world. You must be able to effectively communicate and collaborate with people from different cultures and time zones.Communication: Clearly and concisely communicating with technical and non-technical audiences is essential for any leader. This includes giving clear instructions, listening to feedback, and resolving conflicts.Problem-solving: Identifying and solving problems is essential for any engineer, but it is especially important for leaders. This includes thinking critically, coming up with creative solutions, and making decisions under pressure.Decision-making: The ability to make sound decisions is essential for any leader. This includes weighing the pros and cons of different options, gathering input from others, and making decisions that are in the best interests of the team or organization.Motivation: Any leader's ability to motivate and inspire others is essential. This includes setting clear goals, providing feedback, and creating a positive work environment.Teamwork: Working effectively with others is essential for any leader. This includes building trust, delegating tasks, and resolving conflicts.Change management: Managing change is essential for any leader, especially in the fast-paced world of technology. This includes communicating the need for change, managing resistance, and helping people adapt to new ways of working.Past or present programming experience using Tcl/Tk/Perl/Python/C/C++, as well as Extraction and STA methodologies and tools. This experience will be essential for you to be able to review software architecture and building/maintaining large code base.Demonstrated design and methodology expertise on building ASIC chips in 5nm and below process nodes. This expertise is essential for you to be able to understand and anticipate the requirements for CAD flows. Building CAD flows that focus on improving designer productivity and quality including all available technologies including advanced AI/ML applications in EDA/Chip design space is going to be your end goal.Demonstrable understanding of all aspects of ASIC design flows, DFT, and ATPG flows. This understanding is essential for you to drive methodology unification across a diverse set of business units and SOCs.Solid knowledge of chip integration and chip signoff.
This knowledge will be essential for you to design tools, flows and methodologies for designing chips/chiplets/IPs that would all work seamlessly with each other.What We're Looking ForBS/MS in EE/CS with 15+ years of hands-on experience on design implementation, CAD software or flow development on high-performance CPU and/or SOC designs.Proven track records of leading/architecting flow/tool development.Experience leading teams across multiple geos is a MUST.Expected Base Pay Range (USD)192,600 - 288,500, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional Compensation and Benefit ElementsAt Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
#J-18808-Ljbffr