Advanced Micro Devices, Inc.
Hardware Design Researcher
Advanced Micro Devices, Inc., San Jose, California, United States, 95123
WHAT YOU DO AT AMD CHANGES EVERYTHING
Apply promptly! A high volume of applicants is expected for the role as detailed below, do not wait to send your CV.We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.THE ROLE:AMD is looking for an experienced researcher with the ability to take a complex SoC design to tapeout, as part of a larger team including software development and verification. As a key architect, you will be responsible for synthesis, floorplanning, clocking tree synthesis from mixtures of pre-designed or library RTL designs, to ensure that AMD continues to investigate the highest quality, cutting edge technologies.THE PERSON:The ideal candidate possesses an innovative and problem-solving mindset, and is an expert in hardware development. A successful candidate will need to employ strong knowledge in various SoC technologies, leadership skills in hardware design, and engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while effectively cooperating with advanced software and verification teams.KEY RESPONSIBILITIES:Physical design of complex SoC proof of concept devicesSynthesis, floorplanning, clocking tree synthesis from mixtures of pre-designed or library RTL designs, including CGRA including networks on chip and processor subsystemsAct as a liaison between a software development team, verification team and the hardware development team during hardware developmentAct as a liaison between the hardware development team and the software development team for post-silicon validation and characterizationAct as an interface to a back-end VLSI design team (possibly external)PREFERRED EXPERIENCE:Deep understanding of front-end and back-end VLSI design methodologiesProven track record of multiple (2 or more) successful tapeoutsDemonstrated experience in writing chip testing software for validation and characterizationExperience using Verilog and VHDLExperience using at least 1 EDA CAD tool (ideally Design Compiler)Experienced Python, C++ programmerHistory of publications on devices and design flows at reputable hardware conferences (e.g DAC, VLSI etc)ADDITIONAL EXPERIENCE DESIRED:Experience using TCExperience using FPGA EDA tools (ideally Vivado)ACADEMIC CREDENTIALS:PhD in Computer/Software Engineering, Computer Science, or related technical discipline preferredLOCATION:San Jose, Ca
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Apply promptly! A high volume of applicants is expected for the role as detailed below, do not wait to send your CV.We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.THE ROLE:AMD is looking for an experienced researcher with the ability to take a complex SoC design to tapeout, as part of a larger team including software development and verification. As a key architect, you will be responsible for synthesis, floorplanning, clocking tree synthesis from mixtures of pre-designed or library RTL designs, to ensure that AMD continues to investigate the highest quality, cutting edge technologies.THE PERSON:The ideal candidate possesses an innovative and problem-solving mindset, and is an expert in hardware development. A successful candidate will need to employ strong knowledge in various SoC technologies, leadership skills in hardware design, and engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while effectively cooperating with advanced software and verification teams.KEY RESPONSIBILITIES:Physical design of complex SoC proof of concept devicesSynthesis, floorplanning, clocking tree synthesis from mixtures of pre-designed or library RTL designs, including CGRA including networks on chip and processor subsystemsAct as a liaison between a software development team, verification team and the hardware development team during hardware developmentAct as a liaison between the hardware development team and the software development team for post-silicon validation and characterizationAct as an interface to a back-end VLSI design team (possibly external)PREFERRED EXPERIENCE:Deep understanding of front-end and back-end VLSI design methodologiesProven track record of multiple (2 or more) successful tapeoutsDemonstrated experience in writing chip testing software for validation and characterizationExperience using Verilog and VHDLExperience using at least 1 EDA CAD tool (ideally Design Compiler)Experienced Python, C++ programmerHistory of publications on devices and design flows at reputable hardware conferences (e.g DAC, VLSI etc)ADDITIONAL EXPERIENCE DESIRED:Experience using TCExperience using FPGA EDA tools (ideally Vivado)ACADEMIC CREDENTIALS:PhD in Computer/Software Engineering, Computer Science, or related technical discipline preferredLOCATION:San Jose, Ca
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