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ASIC Designer
TRG - Santa Barbara, California, us, 93190 3 hours ago
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Go to next pageTRG - Santa Barbara, California, us, 93190
RESPONSIBILITIES
Establish block level specifications based on system requirementsDesign, simulate, implement and test analog/mixed-signal CMOS transistor level circuit designs for LIDAR application.Guide physical design team to establish optimal layout and perform post-layout analysis.Support chip level validation, test development, lab characterization, and transition to mass production.Technology nodes range from 22 nm - 180 nm.
REQUIREMENTS
Bachelor's degree in Electrical Engineering, Physics or related discipline.Minimum 5 years of experience in CMOS analog/mixed-signal design.Experienced in ASIC DesignUnderstanding of key challenges in sensor design (mitigation of signal and power supply crosstalk)Familiarity with standard EDA tool suites for custom circuit design (Cadence, Mentor, Synopsys)Good communication skills and successful in a team-oriented environment.
PREFERRED REQUIREMENTS
Automotive experienceFamiliarity with digital design flow and toolsFamiliarity with optical receivers
IMMEDIATE BENEFITS
Paid Time OffTuition and Employee DiscountsAnnual BonusEmployer 401(k) Match
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ASIC Designer