Tbwa Chiat/Day Inc
Manager - VLSI Design Bangalore, India
Tbwa Chiat/Day Inc, California, Missouri, United States, 65018
InnoPhase Inc., DBA GreenWave Radios, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays.
Scroll down to find an indepth overview of this job, and what is expected of candidates Make an application by clicking on the Apply button.Based in San Diego, California, GreenWave Radios has earned a reputation for delivering power-efficient digital-to-RF solutions. Our commitment to innovation is backed by a robust team of more than 100 talented engineers spread across four R&D facilities worldwide and an extensive portfolio of over 120 global patent filings, underscoring our dedication to pushing the boundaries of radio technology.Are you looking to grow your career at a company that 93% of our current staff approve of our leadership, values, and goals?Job DescriptionGreenWave Radios Bangalore is looking for a VLSI Design Manager to join a growing startup semiconductor development organization and to help drive excellence in our 5G ORAN products.Key ResponsibilitiesManage a team of 3-4 Design Engineers for technical leadership and mentoring team members for career growth.Work as primary interface to US design/verification members and management team.Provide executive summary on project tracking, identify and close gaps for the design status.Contribute to 5G cellular product specifications and architectures.Architect and RTL design on CPU & bus system integration, SERDES PCS/PMA control, Rx/Tx signal processing.Participate in design verification to achieve cycle true and bit accurate matching with fixed point model.Run CDC, LINT, LEC tools for RTL designs.Work with PD team for timing closure.Collaborate with System, Software, RF, Analog, and Test teams and provide necessary support.Minimum QualificationsM.Tech/PhD EE/CS preferred.15 years or more of experience in mixed-signal SoC development required.5+ years of project and team management experience with a track record of silicon tape out.Hands-on RTL design experience with Verilog/System Verilog focusing on signal processing HW design such as FIR filter, AGC, FFT/IFFT, etc.Thorough understanding of AMBA (AXI, AHB, APB) bus protocol and design requirements.Experience with multi-core CPU system and peripheral integration.Experience with front-end tools (Verilog simulators, linters, clock-domain crossing checkers).Experience in gate level simulation and LEC checking.Experience using logic synthesis tools from RTL release to gate level synthesis.Experience in static timing analysis, defining timing constraints and exceptions, corners/voltage definitions.Experience bringing highly integrated mixed signal SoCs to commercial mass production.Experience with embedded systems, wireless protocols, power management, signal processing, and standard digital interfaces.Strong background in digital communication architecture.Team player with a strong sense of urgency to complete projects on time.Strong communication and presentation skills.Good skills and interest in mentorship.Preferred SkillsKnowledge of languages such as C/C++, Perl, Tcl, and Python.Experience with formal verification tools.Good knowledge in mixed signal design concepts.Ambitious and goal-oriented.Collaborate effectively in a dynamic team environment.
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Scroll down to find an indepth overview of this job, and what is expected of candidates Make an application by clicking on the Apply button.Based in San Diego, California, GreenWave Radios has earned a reputation for delivering power-efficient digital-to-RF solutions. Our commitment to innovation is backed by a robust team of more than 100 talented engineers spread across four R&D facilities worldwide and an extensive portfolio of over 120 global patent filings, underscoring our dedication to pushing the boundaries of radio technology.Are you looking to grow your career at a company that 93% of our current staff approve of our leadership, values, and goals?Job DescriptionGreenWave Radios Bangalore is looking for a VLSI Design Manager to join a growing startup semiconductor development organization and to help drive excellence in our 5G ORAN products.Key ResponsibilitiesManage a team of 3-4 Design Engineers for technical leadership and mentoring team members for career growth.Work as primary interface to US design/verification members and management team.Provide executive summary on project tracking, identify and close gaps for the design status.Contribute to 5G cellular product specifications and architectures.Architect and RTL design on CPU & bus system integration, SERDES PCS/PMA control, Rx/Tx signal processing.Participate in design verification to achieve cycle true and bit accurate matching with fixed point model.Run CDC, LINT, LEC tools for RTL designs.Work with PD team for timing closure.Collaborate with System, Software, RF, Analog, and Test teams and provide necessary support.Minimum QualificationsM.Tech/PhD EE/CS preferred.15 years or more of experience in mixed-signal SoC development required.5+ years of project and team management experience with a track record of silicon tape out.Hands-on RTL design experience with Verilog/System Verilog focusing on signal processing HW design such as FIR filter, AGC, FFT/IFFT, etc.Thorough understanding of AMBA (AXI, AHB, APB) bus protocol and design requirements.Experience with multi-core CPU system and peripheral integration.Experience with front-end tools (Verilog simulators, linters, clock-domain crossing checkers).Experience in gate level simulation and LEC checking.Experience using logic synthesis tools from RTL release to gate level synthesis.Experience in static timing analysis, defining timing constraints and exceptions, corners/voltage definitions.Experience bringing highly integrated mixed signal SoCs to commercial mass production.Experience with embedded systems, wireless protocols, power management, signal processing, and standard digital interfaces.Strong background in digital communication architecture.Team player with a strong sense of urgency to complete projects on time.Strong communication and presentation skills.Good skills and interest in mentorship.Preferred SkillsKnowledge of languages such as C/C++, Perl, Tcl, and Python.Experience with formal verification tools.Good knowledge in mixed signal design concepts.Ambitious and goal-oriented.Collaborate effectively in a dynamic team environment.
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